A Parallel-Serial Decimal Multiplier Architecture
15TH IEEE INTERNATIONAL CONFERENCE ON COMPUTATIONAL SCIENCE AND ENGINEERING (CSE 2012) / 10TH IEEE/IFIP INTERNATIONAL CONFERENCE ON EMBEDDED AND UBIQUITOUS COMPUTING (EUC 2012)（2012）
Key words
parallel-serial decimal multiplier,digit-serial form,embedded multiplier approach,parallel multiplier,decimal alignment,serial decimal number,parallel-serial proposal,product array,proposed scheme,BCD digit,Parallel-Serial Decimal Multiplier Architecture
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