Processor array design with the use of genetic algorithm

In this paper a method for processors arrays design dedicated to realization of specimen linear algebra algorithms in FPGA devices is presented. Within an allocation mapping process a genetic algorithm for information dependency graph projection is used and the runtime of the given algorithm is optimized. For larger input matrices, graph decomposition is used which allows the projection results to be obtained. The obtained projection results, with and without graph decomposition, for a specimen linear algebra algorithm are compared. Additionally, a parallel realization of the evolutionary algorithm for multicore processors is presented, which allows projection results to be obtained for larger input matrix sizes.