On Reducing Hidden Redundant Memory Accesses for DSP Applications

IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2011)

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摘要
Reducing memory accesses is particularly important for digital signal processing (DSP) applications since they are widely used in embedded systems and need to be executed with high performance and low power consumption. In this paper, we propose a machine-independent loop memory access optimization technique, redundant load exploration and migration (REALM), to explore hidden redundant load operations and migrate them outside loops based on loop-carried data dependence analysis. We implement REALM into IMPACT and Trimaran. To the best of our knowledge, this is the first work to implement the memory access reduction with loop-carried data reuse in real world compilers. We conduct experiments using a set of benchmarks from DSPstone and MiBench on the cycle-accurate VLIW simulator of Trimaran. The experimental results show that our technique significantly reduces the number of memory accesses.
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关键词
instruction scheduling,machine-independent loop memory access,low power consumption,cycle-accurate vliw simulator,memory access,dsp applications,vliw simulator,redundant load operation,digital signal processing chips,mibench,hidden redundant memory access reduction,loop-carried data dependence analysis,digital signal processing application,embedded system,machine-independent loop memory access optimization,digital signal processing (dsp) applications,memory architecture,memory optimization,embedded systems,hidden redundant memory accesses,memory access reduction,dsp application,loop optimization,digital signal processing,loop-carried data reuse,dspstone,optimization technique,redundant load exploration,vliw,optimizing compiler,signal processing,helium,data analysis
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