A practical approach to the synthesis of arithmetic circuits using carry-save-adders
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems（2006）
摘要
Carry-save-adder (CSA) is one of the most widely used types of operation in implementing a fast computation of arithmetics. An inherent limitation of the conventional CSA applications is that the applications are confined to the sections of arithmetic circuit that can be directly translated into addition expressions. To overcome this limitation, from the analysis of the structures of arithmetic circuits found in industry, we derive a set of simple, but effective CSA transformation techniques other than the existing ones. These are 1) optimization across multiplexers, 2) optimization across design boundaries, and 3) optimization across multiplications. Based on the techniques, we develop a new timing-driven CSA transformation algorithm that is able to utilize CSA's extensively throughout all circuits. Experimental data for practical testcases are provided to show the effectiveness of our algorithm
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关键词
adders,addition expression,fast computation,arithmetic circuit,design boundaries,design boundary,practical approach,carry logic,conventional csa application,circuit optimisation,timing,carry-save-adders,experimental data,addition expressions,practical testcases,effective csa transformation technique,arithmetic circuits,multiplications,timing-driven algorithm,inherent limitation,high level synthesis,new timing-driven csa transformation,CSA transformation techniques
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