A case study on error resilient architectures for wireless communication

Reliability is the next big challenge if CMOS scaling will continue. To face this challenge, cross-layer approaches become mandatory. In this paper we present a dynamic error detection and correction flow for wireless communication. We demonstrate this flow on a flexible state-of-the-art decoder, i.e., an HSPA/LTE channel decoder. A profound analysis of the impact of timing and soft errors on the system behavior is presented. Dynamic techniques utilizing higher layers of communication systems to compensate these errors are proposed. This approach results in very low overhead for error resilience.