Implementing the Blue Midnight Wish Hash Function on Xilinx Virtex-5 FPGA Platform

Mohamed El-Hadedy,Martin Margala,Danilo Gligoroski,Svein J. Knapskog

Reconfigurable Computing and FPGAs（2010）

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摘要

This paper presents the design and analysis of an area efficient implementation of the SHA-3 candidate Blue Midnight Wish (BMW-256) hash function with digest size of 256 bits on an FPGA platform. Our architecture is based on a 32 bit data-path. The core functionality with finalization implementation without padding stage of BMW on Xilinx Virtex-5 FPGA requires 84 slices and two blocks of memory: one memory block to store the intermediate values and hash constants and the other memory block to store the instruction controls. The proposed implementation achieves a throughput of 56 Mpbs.

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关键词

hash function,proposed implementation,sha-3 candidate,xilinx virtex-5 fpga,finalization implementation,memory block,blue midnight wish hash,hash constant,blue midnight wish,xilinx virtex-5 fpga platform,fpga platform,area efficient implementation,throughput,registers,field programmable gate arrays,nist,logic design,cryptography,memory management,sha 3

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