Simultaneous FU and register binding based on network flow method

DATE '08: Proceedings of the conference on Design, automation and test in Europe(2008)

引用 54|浏览0
暂无评分
摘要
With the rapid increase of design complexity and the decrease of device features in nano-scale technologies, interconnection optimization in digital systems becomes more and more important. In this paper we develop a simultaneous FU and register (SFR) binding algorithm for multiplexer optimization based on min-cost network flow. Unlike most of the prior approaches in which functional unit binding and register binding are performed sequentially, our approach performs these two highly correlated tasks gradually and concurrently. We also present an ILP formulation of the combined functional unit and register binding problem for the optimality study of heuristics. Experimental results show that when compared to traditional binding algorithms, our simultaneous resource binding algorithm is close to optimal solutions for small-size designs (only 5% more MUX) and achieves significant reduction for MUX area (12%) and timing (10%) for a set of real-life benchmark designs.
更多
查看译文
关键词
logic design,network flow,integrated circuit design,registers,algorithm design and analysis,field programmable gate arrays,register transfer level,design optimization,multiplexing,binding problem,asynchronous,resource allocation,resource management,digital design,nanotechnology,functional unit,network on chip,high level language
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要