Process damage-free damascene metal gate technology for gentle integration of epitaxially grown high-k

Microelectronic Engineering(2008)

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摘要
This paper presents the first successful attempt to integrate crystalline high-k gate dielectrics into a virtually damage-free damascene metal gate process. Process details as well as initial electrical characterization results on fully functional gate Gd"2O"3 dielectric MOSFETs with equivalent oxide thickness (EOT) down to 1.9nm are discussed and compared with devices with rare-earth gate dielectrics fabricated previously in a conventional CMOS process.
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dielectric mosfets,rare-earth oxide,crystalline high-k gate dielectric,rare-earth gate,crystalline high- k gate dielectric,conventional cmos process,process damage-free damascene metal,process detail,initial electrical characterization result,cmp,gadolinium oxide,gentle integration,functional gate,damage-free damascene metal gate,gate technology,equivalent oxide thickness,damascene metal gate,successful attempt
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