Modeling Power Supply Noise in Delay Testing

Jing Wang,Duncan M. (Hank) Walker,Xiang Lu,Ananta Majhi,Bram Kruseman,Guido Gronthoud,Luis Elvira Villagra,Paul J. A. M. van de Wiel,Stefan Eichenberger

Design & Test of Computers, IEEE（2007）

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摘要

Excessive power supply noise during test can cause overkill. This article discusses two models for supply noise in delay testing and their application to test compaction. The proposed noise models avoid complicated power network analysis, making them much faster than existing power noise analysis tools. can cause performance degradation and

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关键词

compaction,low-cost noise model,power electronics,delay variation,excessive power supply noise,compacted test,power noise analysis,power network analysis,filling,delay test,excessive noise,electronic equipment testing,delay testing,extra delay,delays,noise level,power supply noise modeling,test compaction,power engineering computing,power supply quality,power supply noise model,path delay,modeling power supply noise,delay test generation,voltage,computational modeling,cmos technology,network analysis,noise reduction,switches

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