In this work, we propose two translations: one from extended

ACSD '06 Proceedings of the Sixth International Conference on Application of Concurrency to System Design(2006)

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摘要
We study the monitoring and fault-diagnosis problems for dense-time real-time systems, where observers (monitors and diagnosers) have access to digital rather than analog clocks. Analog clocks are infinitely-precise, thus, not implementable. We show how, given a specification modeled as a timed automaton and a timed automaton model of the digital clock, a sound and optimal (i.e., as precise as possible) digital-clock monitor can be synthesized. We also show how, given plant and digital clock modeled as timed automata, we can check existence of a digital-clock diagnoser and, if one exists, how to synthesize it. Finally, we consider the problem of existence of digital-clock diagnosers where the digital clock is unknown. We show that there are cases where a digital clock, no matter how precise, does not exist, even though the system is diagnosable with analog clocks. Finally, we provide a sufficient condition for digital-clock diagnosability.
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关键词
throughput analysis,application mapping,embedded data flow application,synchronous data flow graphs,useful tool,multiprocessing context,single processor,testing,fault detection,automata,real time systems,timed automaton
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