Pessimism Reduction In Static Timing Analysis Using Interdependent Setup And Hold Times

ISQED 2006: PROCEEDINGS OF THE 7TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN(2006)

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摘要
A methodology is proposed for interdependent setup time and hold time characterization of sequential circuits. Integrating the methodology into an industrial sign-off static timing analysis tool is described. The proposed methodology prevents optimism and reduces unnecessary pessimism, both of which exist due to independent characterization. Furthermore, the tradeoff between interdependent setup and hold times is exploited to significantly reduce slack violations. These benefits are validated using industrial circuits and tools.
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关键词
interdependent setup,static timing analysis,sequential circuit,analysis tool,proposed methodology,time characterization,pessimism reduction,interdependent setup time,industrial sign-off static timing,industrial circuit,independent characterization,slack violation,constraint optimization,sequential circuits,degradation,frequency,subthreshold leakage,logic design
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