Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty

VLSI Design(2005)

引用 34|浏览0
暂无评分
摘要
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage reduction techniques on delay/leakage uncertainty is examined through Monte-Carlo analysis. The techniques investigated in this paper include increasing gate length, stack forcing, body biasing, and V_dd/V_th optimization. The impact of technology scaling and temperature sensitivity on the uncertainty reduction are also evaluated. We investigate the uncertainty-power-delay trade-off and suggest techniques for designs targeting different requirements.
更多
查看译文
关键词
body biasing,different requirement,leakage power,leakage reduction techniques,gate length,v_th optimization,uncertainty reduction,leakage reduction technique,main challenge,monte-carlo analysis,leakage uncertainty,process variation,monte carlo methods,monte carlo analysis,integrated circuit design,low power electronics
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要