Scalable hardware memory disambiguation for high-ILP processors

Simha Sethumadhavan,Rajagopalan Desikan,Doug Burger,Charles R. Moore,Stephen W. Keckler

IEEE Micro（2004）

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摘要

Power is a major problem for scaling the hardware needed to support memory disambiguation in future out-of-order architectures. In current machines, the traditional detection of memory ordering violations requires frequent associative searches of state proportional to the instruction window size. A new class of solutions yields an order-of-magnitude reduction in the energy required to properly order loads and stores for windows of hundreds to thousands of in-flight instructions

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关键词

memory disambiguation,scalable hardware memory disambiguation,lsq search,partitioned lsqs,storage management,ilp processors,parallel architectures,in-flight instructions,boththe number,instruction level parallelism,bloom filters manyimprovements,high ilp processors,small instruction window machine,lightweight approximate hashingin hardware,bloom filters,associativelsq search,memory disambiguation hardware,memory architecture,instruction sets,bloom filter,out-of-order architecture,byboth instruction age,memory management,indexation,high frequency,out of order

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