Sébastien Fregonese

Sébastien Fregonese was born in Bordeaux, France, in 1979. He received the M.Sc. and Ph.D. degrees in electronics from Université Bordeaux, Bordeaux, France, in 2002 and 2005, respectively. During his Ph.D. research, he investigated SiGe heterojunction bipolar transistors (HBTs), with emphasis on compact modeling. From 2005 to 2006, he was a Postdoctoral Researcher with TU Delft, Delft, The Netherlands, where his research activities dealt with the Si strain field-effect transistor (FET) emerging devices, focusing on process and device simulation. In 2007, he joined CNRS, IMS, Bordeaux, France, as a Researcher. From 2011 to 2012, he was a Visiting Researcher with the University of Lille, Villeneuve-d’Ascq, France, focusing on the graphene FET device modeling. He is involved in a couple of National and European research projects such as the European FP7 IP Dot5, Dot7, FET GRADE, and H2020 TARANTO. His current research interests include the electrical compact modeling and characterization of HF devices such as SiGe HBTs and carbon-based transistors.