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He is a Candidate for a Doctoral degree in Computer Science, under the advisory of Prof. Aviral Shrivastava, from the School of Computing Informatics and Decision Systems Engineering, ASU.
Reiley graduated from the University of Madras, India with a bachelors degree in engineering in 2004, and joined L&T Infotech, India as a software engineer. He then received his MS degree in Electrical Engineering in 2008. He has been associated with the Compiler Microarchitecture Lab, SCIDSE, ASU, as a Research Associate since Aug 2006.
His primary research focus is in developing compiler-based solutions to improve embedded system reliability through analytical modeling and analysis of the processor microarchitecture. His other areas of interest include: developing compiler solutions to enable the efficient use of CGRAs and such power-efficient many-core architectures; and developing hybrid compiler-architecture solutions to reduce embedded system power consumption.
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论文共 28 篇作者统计合作学者相似作者
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Jason Lowe-Power, Abdul Mutaal Ahmad,Ayaz Akram,Mohammad Alian,Rico Amslinger,Matteo Andreozzi,Adrià Armejach,Nils Asmussen,Srikant Bharadwaj, Gabe Black,Gedare Bloom,Bobby R. Bruce,
arxiv(2020)
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