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Paul Werbaneth received the B.S. degree in chemical engineering from Cornell University, Ithaca, NY, USA, and recently completed studies in spoken Japanese from the Cornell Summer FALCON Program, and in marketing strategy from Cornell University. He is a Global Product Manager with Nor-Cal Products, Inc. Since entering the semiconductor industry in 1980, he has been a hands-on Photolithography Process Sustaining Engineer with Intel; a Senior Plasma Etch Process Engineer with Hitachi High Technologies; the Country Manager with Tegal Japan, Inc.; the Vice President of Marketing and Applications with Tegal Corporation; a Business Development Manager with EV Group; an independent consultant and writer; and the Global Product Marketing Director with Intevac, Inc. He has authored the contributed chapter on TSV etching in the book entitled 3D Integration for VLSI Systems, and has written or co-written an extensive number of articles, papers, and blogs regarding the semiconductor capital equipment business, advanced packaging, and various aspects of semiconductor device manufacturing. He is a member of the SEMI Advanced Semiconductor Manufacturing Conference Steering Committee, and was the SEMI ASMC 2004 Conference Co-Chair. He has been active in the Northern California Chapter of the American Vacuum Society for many years. He is the Program Chair for the NCCAVS Technical Symposium in 2019, and will be the Chapter Chair for 2019. He is also a Guest Editor of the IEEE Transactions on Semiconductor Manufacturing.
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论文共 13 篇作者统计合作学者相似作者
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IEEE Transactions on Semiconductor Manufacturingno. 3 (2023): 307-310
International Symposium on Microelectronicsno. 1 (2018): 000748-000753
Paul Werbaneth,Billy Runstadler, Sam North,Vladimir Kudriavtsev, Sriram Krishnaswami, Luy Danh, Terry Bluck, Camron Blonigan
2018 International Wafer Level Packaging Conference (IWLPC)pp.1-8, (2018)
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