He developed highly scaled lateral and vertical nanowire gate-all-around FETS, NVM devices and high efficiency silicon solar cells. Prior to that Dr Singh worked on lithography technology development for 9 years [1996–2004] focusing on resolution enhancement techniques. Dr. Singh has authored or co-authored more than 190 technical papers (citations > 1900 & h-index: 22) in referred archival journals and conferences and has filed more than 20 technology disclosures. His nanowire gate-all-around FET papers have been selected for pre-conference publicity by IEDM and SSDM conferences. He is a recipient of George E. Smith Award 2007 for best paper in IEEE Electron Device Letters, Singapore National Technology Award 2008 for his outstanding contributions to the research and development of nanowire-technology platform, enabling the realization of ultimately scaled CMOS integrated circuits and new class of electronic bio-sensors, IME Excellence Award 2009 for industry project developing Surround Gate Transistor (SGT) technology, and A*STAR TALENT award 2010 for Leading, Educating and Nurturing Talents.