Matthew V Metz - intel | 人才画像

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论文共 170 篇作者统计合作学者相似作者

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Multi-domain Phase-field Modeling of Polycrystalline Hafnia-based (Anti-)ferroelectrics Capable of Representing Defects, Wake-up and Fatigue

Sou-Chi Chang,Kisung Chae,Mihaela I. Popovici,Chia-Ching Lin, Saima Siddiqui,I-Cheng Tung,Jasper Bizindavyi, Bernal Granados Alpizar,Nazila Haratipour,Matthew Metz,Jack Kavalieros,Gouri S. Kar,

2022 International Electron Devices Meeting (IEDM)（2022）

引用1浏览0EIWOS引用

Gate length scaling beyond Si: Mono-layer 2D Channel FETs Robust to Short Channel Effects

C. J. Dorow,A. Penumatcha, A. Kitamura, C. Rogan,K. P. O’Brien,S. Lee, R. Ramamurthy, C. -Y. Cheng, K. Maxey, T. Zhong, T. Tronic, B. Holybee,

2022 International Electron Devices Meeting (IEDM)pp.7.5.1-7.5.4, (2022)

引用3浏览0EIWOS引用

300 mm MOCVD 2D CMOS Materials for More (Than) Moore Scaling

K. Maxey,C. H. Naylor,K. P. O'Brien,A. Penumatcha,A. Oni,C. Mokhtarzadeh,C. J. Dorow, C. Rogan, B. Holybee, T. Tronic, D. Adams,N. Arefin,

Symposium on VLSI Technology (VLSI Technology)（2022）

引用5浏览0EIWOS引用

Hafnia-Based FeRAM: A Path Toward Ultra-High Density for Next-Generation High-Speed Embedded Memory

Nazila Haratipour,Sou-Chi Chang,Shriram Shivaraman,Christopher Neumann,Yu-Ching Liao, Bernal G Alpizar,I-Cheng Tung,Hai Li,Vachan Kumar,Brian Doyle, Sarah Atanasov, Jason Peck,

2022 International Electron Devices Meeting (IEDM)pp.6.7.1-6.7.4, (2022)

引用1浏览0EIWOS引用

Opportunities in 3-D stacked CMOS transistors

M. Radosavljevic,C.-Y. Huang, W. Rachmady,S.H. Seung,N. K. Thomas, G. Dewey,A. Agrawal, K. Owens, C. C. Kuo, C. J. Jezewski, R. Nahm,N. Briggs,

2021 IEEE International Electron Devices Meeting (IEDM)pp.34.1.1-34.1.4, (2021)

引用3浏览0EIWOS引用

Advancing Monolayer 2-D nMOS and pMOS Transistor Integration From Growth to Van Der Waals Interface Engineering for Ultimate CMOS Scaling

Chelsey Dorow,Kevin O’Brien,Carl H. Naylor,Sudarat Lee,Ashish Penumatcha, Andy Hsiao,Tristan Tronic,Michael Christenson,Kirby Maxey, Hui Zhu,Adedapo Oni, Urusa Alaan,

IEEE Transactions on Electron Devices（2021）

引用24浏览0EIWOS引用

FeRAM using Anti-ferroelectric Capacitors for High-speed and High-density Embedded Memory

S. -C. Chang,N. Haratipour,S. Shivaraman,C. Neumann, S. Atanasov, J. Peck,N. Kabir, I. -C. Tung, H. Liu, B. Krist,A. Oni,S. Sung,

2021 IEEE International Electron Devices Meeting (IEDM)pp.33.2.1-33.2.4, (2021)

引用12浏览0EIWOS引用

Advancing 2D Monolayer CMOS Through Contact, Channel and Interface Engineering

K. P. O'Brien,C. J. Dorow,A. Penumatcha, K. Maxey,S. Lee,C. H. Naylor, A. Hsiao, B. Holybee, C. Rogan, D. Adams, T. Tronic, S. Ma,

2021 IEEE International Electron Devices Meeting (IEDM)pp.7.1.1-7.1.4, (2021)

引用40浏览0EIWOS引用

Cmos Compatible Process Integration Of Sot-Mram With Heavy-Metal Bi-Layer Bottom Electrode And 10ns Field-Free Sot Switching With Stt Assist

Noriyuki Sato,Gary A. Allen, William P. Benson, Benjamin Buford, Atreyee Chakraborty,Michael Christenson,Tanay A. Gosavi, Philip E. Heil,Nafees A. Kabirl, Brian J. Kristl,Kevin P. O'Brien,Kaan Oguz,

2020 IEEE SYMPOSIUM ON VLSI TECHNOLOGY（2020）

引用10浏览0EIWOS引用

Gate-All-Around Strained Si0.4Ge0.6 Nanosheet PMOS on Strain Relaxed Buffer for High Performance Low Power Logic Application

A. Agrawal,S. Chouksey, W. Rachmady,S. Vishwanath,S. Ghose,M. Mehta,J. Torres,A.A. Oni,X. Weng, H. Li, D. Merrill,M. Metz,

2020 IEEE International Electron Devices Meeting (IEDM)（2020）

引用31浏览0EIWOS引用

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