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Kenji Shiozawa received the B.S. degree in electronic engineering from Nihon University, Funabashi, Japan, in 1982, and the Ph.D. degree from Tohoku University, Sendai, Japan, in 2013.
In 1982, he joined the Device Development Center of Hitachi Ltd., Tokyo, Japan, where he was engaged in work on CMOS devices. Since joining the Semiconductor and Integrated Circuits Division, Hitachi, in 1996, he has engaged in the development of microprocessor devices as a Project Manager. He developed a yield calculation equation with net-length parameters extracted from net-length distributions of integrated circuits. His current interest is in high-performance and low-power CMOS designs for high reliability and failure analysis.
Dr. Shiozawa is a member of the Institute of Electronics, Information and Communication Engineers of Japan.
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Yoshikazu Nagamura,Kenji Shiozawa,Toru Koyama,Jun Matsushima, Kazuhiro Tomonaga, Yutaka Hoshi, Shuji Nomura,Masayuki Arai,Kazuhiko Iwasaki
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