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Jeremy Casas received the M.S. degree in CS from the Oregon Graduate Institute. He is a Research Scientist with Intel Labs, currently focused on R&D of new design and verification paradigms and development environments for modern computer designs. Prior to joining Intel Labs, he was a Post-Silicon Validation Architect with Intel's client product development group. He has extensive experience on development and application of dynamic and formal verification systems, micro-architecture design and verification, and post-Silicon validation/debug tools and methodologies. He has publications in conferences/journals and several patents.
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Debjit Pal,Yi-Hsiang Lai,Shaojie Xiang,Niansong Zhang,Hongzheng Chen,Jeremy Casas,Pasquale Cocchini,Zhenkun Yang, Jin Yang, Louis-Noël Pouchet,Zhiru Zhang
Proceedings of the 59th ACM/IEEE Design Automation Conference (2022)
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