Ephrem G Gebreselasie

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Impact of silicide process on eFuse programming, reliability and ruggedness in RF BiCMOS Technology

Ephrem Gebreselasie, Alain Loiseau, Yves Ngu, Ian Mcallum-Cook

2019 30TH ANNUAL SEMI ADVANCED SEMICONDUCTOR MANUFACTURING CONFERENCE (ASMC), (2019)

Bibtex

Impact of silicide process on eFuse programming, reliability and ruggedness in RF BiCMOS Technology

Ephrem Gebreselasie, Alain Loiseau, Yves Ngu, Ian Mcallum-Cook

advanced semiconductor manufacturing conference, pp.1-4, (2019)

Bibtex

3-D Integration and ESD Protection: Design and Analysis

Souvick Mitra,Ephrem Gebreselasie, You Li,Robert J. Gauthier, Thuy Tran-quinn

IEEE Transactions on Device and Materials Reliability, no. 4 (2016): 497-503

EIWOSBibtex

VERTICAL SILICIDE E-FUSE

Ephrem G Gebreselasie, J M Lukaitis, Robert R Robison, William R Tonti, Pingchuan Wang

(2012)

Cited by2Bibtex

Transient latch-up of switching arrays in power management circuits

Nathaniel Peachey,Robert J Gauthier, Richard A Phelps,Ephrem G Gebreselasie

(2012)

Cited by6Bibtex

Diode protection of GMR sensors

Icko Iben,Ephrem G Gebreselasie,Alain Loiseau,Robert J Gauthier

(2011)

Cited by4Bibtex

Line edge roughness and spacing effect on low-k TDDB characteristics

Feixiang Chen,J R Lloyd,Kaushik Chanda,Ravi Achanta,O Bravo,Alvin W Strong,Paul S Mclaughlin,M Shinosky,Sujatha Sankaran,Ephrem G Gebreselasie, Anthony K Stamper,Z X He

(2008)

Cited by30Bibtex

ESD Testing of Aluminum and Copper Vertical Parallel plate (VPP) Capacitor Structures

Steven H Voldman,Ephrem G Gebreselasie,Zhongxiang He

(2007)

Cited by1Bibtex

A 0.35 μm SiGe BiCMOS technology for power amplifier applications

Alvin J Joseph,Qizhi Liu,W Hodge, Paul R Gray,Kenneth J Stein, R Previtikelly,Peter J Lindgren,Ephrem G Gebreselasie, B Voegeli,Panglijen Candra, Douglas B Hershberger,R M Malladi

(2007)

Cited by35Bibtex

Electrically Programmable Fuses for Analog and Mixed Signal Applications in Silicon Germanium BiCMOS Technologies

Ephrem G Gebreselasie,Steven H Voldman,Z X He,D Coolbaugh,Robert M Rassel, T Kirihata, Andrea Paganini, C G Cox, S Mongeon,S A St Onge,James S Dunn, Ralph Halbach

(2007)

Cited by3Bibtex

The influence of implanted sub-collector on CMOS latchup robustness

Steven H Voldman,Ephrem G Gebreselasie

(2005)

Cited by4Bibtex

The influence of high resistivity substrates on CMOS latchup robustness

Steven H Voldman,Ephrem G Gebreselasie,X F Liu,D Coolbaugh,Alvin J Joseph

Tucson, AZ, pp.1-10E, (2005)

Cited by6EIWOSBibtex

Low-voltage diode-configured sige:C HBT triggered ESD power clamps using a raised extrinsic base 200/285 GHz (f T /f MAX ) SiGe:C HBT device

Steven H Voldman,Ephrem G Gebreselasie

(2004)

Cited by3Bibtex

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