Andreas Dixius - Chair for Highly-Parallel VLSI Systems and Neuromorphic Circuits, Technische Universität Dresden

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Bio

Andreas Dixius received the Dipl.-Ing. (M.Sc.) degree in information systems engineering from Technische Universität Dresden, Dresden, Germany, in 2014. He is currently a Research Associate with the Chair of Highly-Parallel VLSI-Systems and Neuromorphic Circuits, Technische Universität Dresden. His research interests include MPSoC architecture, digital design, code generation, physical implementation and design for test.

Research Interests

Papers共 20 篇Author StatisticsCo-AuthorSimilar Experts

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NLU: an Adaptive, Small-Footprint, Low-Power Neural Learning Unit for Edge and IoT Applications

Amirhossein Rostami, Seyed Mohammad Ali Zeinolabedin,Liyuan Guo,Florian Kelber,Heiner Bauer,Andreas Dixius,Stefan Scholze,Marc Berthel,Dennis Walter,Johannes Uhlig,Bernhard Vogginger,Christian Mayr

IEEE Open J Circuits Syst (2025): 85-99

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68-Channel Neural Signal Processing System-on-chip with Integrated Feature Extraction, Compression, and Hardware Accelerators for Neuroprosthetics in 22 Nm FDSOI

Liyuan Guo,Annika Weisse,Seyed Mohammad Ali Zeinolabedin,Franz Marcus Schueffny,Marco Stolba, Qier Ma, Zhuo Wang,Stefan Scholze,Andreas Dixius,Marc Berthel,Johannes Partzsch,Dennis Walter,Georg Ellguth,Sebastian Hoeppner,Richard George,Christian Mayr

FRONTIERS IN NEUROSCIENCE (2024)

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68-Channel Highly-Integrated Neural Signal Processing PSoC with On-Chip Feature Extraction, Compression, and Hardware Accelerators for Neuroprosthetics in 22nm FDSOI

Liyuan Guo,Annika Weiße,Seyed Mohammad Ali Zeinolabedin,Franz Marcus Schüffny,Marco Stolba, Qier Ma, Zhuo Wang,Stefan Scholze,Andreas Dixius,Marc Berthel,Johannes Partzsch,Dennis Walter,Georg Ellguth,Sebastian Höppner,Richard George,Christian Mayr

arxiv（2024）

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A Low-Power Hardware Accelerator of MFCC Extraction for Keyword Spotting in 22nm FDSOI

Liyuan Guo,Matthias Jobst,Johannes Partzsch,Stefan Scholze,Andreas Dixius, Matthias Lohrmann,Seyed Mohammad Ali Zeinolabedin,Christian Mayr

AICASpp.1-5, (2023)

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A Random Linear Network Coding Platform MPSoC Designed in 22nm FDSOI

Mattis Hasler,Sebastian Haas,Robert Wittig,Scholze Stefan,Andreas Dixius,Sebastian Hoeppner,Gerhard Fettweis,Christian Mayr

IEEE Computer Society Annual Symposium on VLSI（2022）

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A 16-Channel Fully Configurable Neural SoC with 1.52 $\mu$w/ch Signal Acquisition, 2.79 $\mu$w/ch Real-Time Spike Classifier, and 1.79 TOPS/W Deep Neural Network Accelerator in 22 Nm FDSOI

Seyed Mohammad Ali Zeinolabedin,Franz Marcus Schuffny,Richard George,Florian Kelber,Heiner Bauer,Stefan Scholze,Stefan Hanzsche,Marco Stolba,Andreas Dixius,Georg Ellguth,Dennis Walter,Sebastian Hoeppner,Christian Mayr

IEEE Transactions on Biomedical Circuits and Systems（2022）

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A 64-Channel Back-Gate Adapted Ultra-Low-voltage Spike-Aware Neural Recording Front-End with On-Chip Lossless/near-Lossless Compression Engine and 3.3V Stimulator in 22nm FDSOI

Franz Marcus Schüffny,Seyed Mohammad Ali Zeinolabedin,Richard George,Liyuan Guo,Annika Weiße,Johannes Uhlig,Julian Meyer,Andreas Dixius,Stefan Hänzsche,Marc Berthel,Stefan Scholze,Sebastian Höppner,Christian Mayr

2022 IEEE Asian Solid-State Circuits Conference (A-SSCC) (2022)

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Hardware Implementation of an OPC UA Server for Industrial Field Devices

Heiner Bauer,Sebastian Hoeppner,Chris Iatrou,Zohra Charania,Stephan Hartmann, Saif Ur Rehman,Andreas Dixius,Georg Ellguth,Dennis Walter,Johannes Uhlig,Felix Neumaerker,Marc Berthel,Marco Stolba,Florian Kelber,Leon Urbas,Christian Mayr

IEEE Transactions on Very Large Scale Integration (VLSI) Systems（2021）

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8. Creating the Future

Dave Clark,Andreas Dixius,Steve Furber,Jim Garside,Michael Hopkins,Sebastian Höppner, Dongwei Hu,Florian Kelber,Gengting Liu,Christian Mayr,Mantas Mikaitis,Felix Neumärker,Johannes Partzsch,Stefan Schiefer,Stefan Scholze,Delong Shang,Marco Stolba

SPINNAKER: A Spiking Neural Network Architecturepp.262-279, (2020)

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