Dhruva is a senior researcher in HP Labs interested in building novel, high-performing systems software. He is currently investigating programming techniques with non-volatile memory, focusing on durability and concurrency aspects. In the recent past, he has worked on semantics and implementation of transactional memory. Prior to joining HP Labs in 2008, he was a member of the high level optimizer team in the HPUX compiler section. He led the loop optimization and the automatic parallelization projects and was at the forefront of the inter-procedural optimizer development. He received his PhD in Electrical and Computer Engg. from Northwestern University in 2000. His doctoral thesis was on the PARADIGM compiler where he developed an automatic parallelization framework for irregular and hybrid scientific applications. He received an M.Tech. in Computer Science from the Indian Institute of Technology, Kanpur (IITK) in 1996 during which he designed efficient testing methodologies for regular VLSI circuits. He obtained a B.E. degree in 1994, also in Computer Science, from Jadavpur University. Dhruva has been granted 9 US patents and more are pending.