Craig Riddet - Gold Standard Simulations Ltd, Synopsys

基本信息

Career Trajectory

Bio

Craig Riddet received the Ph.D. degree in semiconductor device modeling from the University of Glasgow, Glasgow, U.K., in 2008. He was a member of the Device Modeling Group with the School of Engineering, University of Glasgow, from 2008 to 2013. He was Model Development Executive at Gold Standard Simulations Ltd., Glasgow, from 2013 to 2016. He is currently a R&D Senior Engineer at Synopsys Inc., Glasgow.

Research Interests

Papers共 32 篇Author StatisticsCo-AuthorSimilar Experts

By YearBy Citation主题筛选期刊级别筛选合作者筛选合作机构筛选

Challenges in Design and Modeling of Cold CMOS HPC Technology

Victor Moroz,Jamil Kawa,Xi-Wei Lin,Andrew R. Brown,Plamen Asenov,Jaehyun Lee,Mohit Bajaj, Tyler Michalak,Craig Riddet,Alexei Svizhenko, Renato Hentschke,Soren Smidstrup

2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)（2021）

Cited7Views0EIWOSBibtex

Experimental and Simulation Study of Silicon Nanowire Transistors Using Heavily Doped Channels

Vihar P. Georgiev,Muhammad M. Mirza,Alexandru-Iustin Dochioiu,Fikru Adamu-Lema,Salvatore M. Amoroso,Ewan Towie,Craig Riddet,Donald A. MacLaren,Asen Asenov,Douglas J. Paul

IEEE Transactions on Nanotechnology（2017）

Cited19Views0EIWOSBibtex

Experimental and Simulation Study of a High Current 1D Silicon Nanowire Transistor Using Heavily Doped Channels

Vihar P. Georgiev,Muhammad M. Mirza,Alexandru-Iustin Dochioiu,Fikru-Adamu Lema, Slavatore M. Amoroso,Ewan Towie,Craig Riddet,Donald A. MacLaren,Asen Asenov,Douglas J. Paul

2016 IEEE Nanotechnology Materials and Devices Conference (NMDC)（2016）

Cited2Views0EIWOSBibtex

Impact of Strain on the Performance of Si Nanowires Transistors at the Scaling Limit: A 3d Monte Carlo/2d Poisson Schrodinger Simulation Study

Talib Al-Ameri,Vihar P. Georgiev,Fikru-Adamu Lema,Toufik Sadi,Xingsheng Wang,Ewan Towie,Craig Riddet,Craig Alexander,Asen Asenov

2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)（2016）

Cited13Views0EIWOSBibtex

One-dimensional Multi-Subband Monte Carlo Simulation of Charge Transport in Si Nanowire Transistors

Toufik Sadi,Ewan Towie,Mihail Nedjalkov,Craig Riddet,Craig Alexander,Liping Wang,Vihar Georgiev,Andrew Brown,Campbell Millar,Asen Asenov

2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)（2016）

Cited7Views0EIWOSBibtex

Multi-Subband Ensemble Monte Carlo Simulation of Si Nanowire Mosfets

Luca Donetti,Carlos Sampedro,Francisco Gamiz,Andres Godoy,Francisco J. Garcia-Ruiz,Ewan Towie,Vihar P. Georgiev,Salvatore Maria Amoroso,Craig Riddet,Asen Asenov

2015 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD)（2015）

Cited8Views0EIWOSBibtex

Predictive Simulation and Benchmarking of Si and Ge Pmos FinFETs for Future CMOS Technology

Lucian Shifren,Robert Aitken,Andrew R. Brown,Vikas Chandra,Binjie Cheng,Craig Riddet,Craig L. Alexander,Brian Cline,Campbell Millar,Saurabh Sinha,Greg Yeric,Asen Asenov

IEEE Transactions on Electron Devices（2014）

Cited32Views0EIWOSBibtex

Inverse Scaling Trends for Charge-Trapping-Induced Degradation of FinFETs Performance

Salvatore Maria Amoroso,Vihar P. Georgiev,Louis Gerrer,Ewan Towie,Xingsheng Wang,Craig Riddet,Andrew Robert Brown,Asen Asenov

IEEE Transactions on Electron Devices（2014）

Cited12Views0EIWOSBibtex

Performance and Variability of Doped Multithreshold FinFETs for 10-Nm CMOS

Fikru Adamu-Lema,Xingsheng Wang,Salvatore Maria Amoroso,Craig Riddet,Binjie Cheng,Lucian Shifren,Robert Aitken, Saurahb Sinha,Greg Yeric,Asen Asenov

IEEE Transactions on Electron Devices（2014）

Cited17Views0EIWOSBibtex

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