Chi-Weon Yoon - Flash Memory Design Team, Samsung Electronics

基本信息

Career Trajectory

Bio

Chi-Weon Yoon (chiweon.yoon@samsung.com) received his M.S. and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea, in 1999 and 2004, respectively. He is a vice president of technology with Samsung Electronics, Hwasung city, 18448, South Korea, where he has worked for more than 16 years on the Flash Memory Design Team. He holds more than 110 global patents on nonvolatile, memory-related circuits and cell-operation algorithms. His current research interests include the design of high-performance and low-cost cell-operation algorithms, analog circuits, and high-speed, input–output circuits.

Research Interests

Papers共 47 篇Author StatisticsCo-AuthorSimilar Experts

By YearBy Citation主题筛选期刊级别筛选合作者筛选合作机构筛选

30.1 A 28gb/mm 2 4Xx-Layer 1tb 3b/cell WF-Bonding 3D-NAND Flash with 5.6gb/s/pin IOs

Sang-Soo Park, Jaedoeg Lyu, Myungjun Kim, Jaeyun Lee, Youngsun Song, Chungho Yu, Makoto Hirano, Yongseok Kwon, Jonghoon Park, Hojoon Kim, Daein Lee,Donghyun Seo, Byungrok Go, Seoyoon Jeon, Yoonjee Kim, Doo-Hyun Kim, Youngmin Jo,Hyun-Jun Yoon, Junehong Park, In-Mo Kim,Sunghoon Kim,Hokil Lee, Je-Hyeon Yu, Sanglok Kim, Hwan-Seok Ku,Jungmin Seo,Jindo Byun, Seunghyeon Yun, Kyoungtae Kang, Seung-Beom Kim, Yohan Lee, Yongkyu Lee, Kyung-Hwa Kang,Hanjun Lee, YoungHwan Ryu, Hyundo Kim, Wontae Kim, Hyeongdo Choi, Juho Jeon, Ansoo Park, Raehyun Song, Jae-Hwan Kim, Jungsoo Kim, Hwaseok Lee, Mookyung Lee, Jae-Ick Son,Jiho Cho, Moosung Kim, Jae-Woo Im,Jongmin Park, Hyuckjoon Kwon,Youngdon Choi,Chiweon Yoon, Seungjae Lee,Kiwhan Song,Sunghoi Hur

IEEE International Solid-State Circuits Conferencepp.1-3, (2025)

Cited0Views0EIBibtex

30.1 A 28Gb/mm24xx-Layer 1tb 3b/cell WF-Bonding 3D-NAND Flash with 5.6gb/s/pin IOs

Sang-Soo Park, Jae-Doeg Lyu, Myungjun Kim, Jaeyun Lee, Younsun Song, Chung-Ho Yu, Hirano Makoto, Yongseok Kwon,Jong-Hoon Park, Ho-Joon Kim, Daein Lee,Donghyun Seo, Byungrok Go, Seoyoon Jeon, Yoonjee Kim, Doo-Hyun Kim, Youngmin Jo,Hyunjun Yoon, Junehong Park,Inmo Kim,Sunghoon Kim,Hokil Lee, Je-Hyeon Yu,Sang-Lok Kim, Hwan-Seok Ku,Jungmin Seo,Jindo Byun, Seung-Hyeon Yun,Kyoungtae Kang, Seung-Beom Kim, Yohan Lee, Yongkyu Lee, Kyunghwa Kang, Han-Jun Lee,Younghwan Ryu, Hyundo Kim, Wontae Kim, Hyeongdo Choi, Juho Jeon,Ansoo Park,Raehyun Song, Jae-Hwan Kim, Jung-Soo Kim, Hwa-Seok Lee, Moo-Kyung Lee,Jae-Ick Son,Jiho Cho,Moosung Kim,Jae-Woo Im,Jongmin Park, Hyuckjoon Kwon,Youngdon Choi,Chiweon Yoon, Seungjae Lee,Kiwhan Song, Sung-Hoi Hur

2025 IEEE International Solid-State Circuits Conference (ISSCC) (2025): 1-3

Cited0Views0EIWOSBibtex

Integrated Circuit to Compensate Parasitic Leakage Component for WL Leakage Current in NAND Flash Memory

Bu-Il Nam, Jayang Yoon, Kyunghea Lee, Sol Kim,Junhong Park,Chiweon Yoon, Eunkyoung Kim

IEEE Solid-State Circuits Letterspp.1-1, (2024)

Cited0Views0EIWOSBibtex

A 3.0 Gb/s/pin 4^th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package

Youngmin Jo,Anil Kavala,Tongsung Kim,Byungkwan Chun,Jung-June Park,Taesung Lee,Jungmin Seo,Manjae Yang,Taehyeon Park,Hyunjin Kwon, Cheolhui Lee,Younghoon Son, Junghwan Kwak,Younggyu Lee, Hwan Seok Ku,Daehoon Na,Changyeon Yu,Jonghoon Park,JaeHwan Kim,Hyojin Kwon,Chanho Kim,Moon-Ki Jung,Chanjin Park,Donghyun Seo,Moosung Kim, Seungjae Lee,Jin-Yub Lee,Dongku Kang,Chiweon Yoon,SungHoi Hur

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)pp.1-2, (2023)

Cited0Views0EIWOSBibtex

A 3.0 Gb/s/pin 4 th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package

Youngmin Jo,Anil Kavala,Tongsung Kim,Byung-Kwan Chun,Jungjune Park,Taesung Lee,Jungmin Seo,Manjae Yang,Taehyeon Park,Hyunjin Kwon, Cheolhui Lee,Younghoon Son, Junghwan Kwak,Younggyu Lee, Hwan-Seok Ku,Dae-Hoon Na,Changyeon Yu,Jonghoon Park,Jae-Hwan Kim,Hyojin Kwon,Chan-ho Kim,Moon-Ki Jung,Chanjin Park,Donghyun Seo,Moosung Kim, Seungjae Lee,Jin-Yub Lee,Dongku Kang,Chiweon Yoon,SungHoi Hur

VLSI Technology and Circuitspp.1-2, (2023)

Cited0Views0EIBibtex

A 3.0 Gb/s/pin 4th Generation F-chip with Toggle 5.0 Specification for 16tb NAND Flash Memory Multi Chip Package

Youngmin Jo,Anil Kavala,Tongsung Kim,Byungkwan Chun, Jung-June Park,Taesung Lee,Jungmin Seo,Manjae Yang,Taehyeon Park,Hyunjin Kwon, Cheolhui Lee,Younghoon Son, Junghwan Kwak,Younggyu Lee, Hwan Seok Ku,Daehoon Na,Changyeon Yu,Jonghoon Park,JaeHwan Kim,Hyojin Kwon,Chanho Kim, Moon-Ki Jung,Chanjin Park,Donghyun Seo,Moosung Kim, Seungjae Lee,Jin-Yub Lee,Dongku Kang,Chiweon Yoon,SungHoi Hur

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (2023)

Cited0Views0Bibtex

Analysis of Residual Stresses Induced in the Confined 3D NAND Flash Memory Structure for Process Optimization

Eun-Kyeong Jang,Ik-Jyae Kim,Cheon An Lee,Chiweon Yoon,Jang-Sik Lee

IEEE Journal of the Electron Devices Society（2022）

Cited7Views0EIWOSBibtex

A Hybrid Temperature Compensation Method Combined with Digital and Analog Temperature Compensation Techniques for 3D-NAND Flash Memories

Dojeon Lee,Junhong Park, Philkyu Kang, Sungmin Jo, Seheon Baek,Chi-Weon Yoon,Dongku Kang

2022 IEEE Asian Solid-State Circuits Conference (A-SSCC) (2022)

Cited0Views0EIWOSBibtex

The Fundamentals of NAND Flash Memory: Technology for Tomorrow’s Fourth Industrial Revolution

Chi-Weon Yoon

IEEE solid-state circuits magazine（2022）

Cited18Views0EIWOSBibtex

Author Statistics

Co-Author

Co-Institution

D-Core

合作者
学生
导师

No result temporarily, you can search similar Scholar with the same research interest

Data Disclaimer

The page data are from open Internet sources, cooperative publishers and automatic analysis results through AI technology. We do not make any commitments and guarantees for the validity, accuracy, correctness, reliability, completeness and timeliness of the page data. If you have any questions, please contact us by email: report@aminer.cn