Duane S. Boning received the S.B. degrees in electrical engineering and in computer science in 1984, and the S.M. and Ph.D. degrees in electrical engineering in 1986 and 1991, respectively, all from the Massachusetts Institute of Technology. He was an NSF Fellow from 1984 to 1989, and an Intel Graduate Fellow in 1990. From 1991 to 1993 he was a Member Technical Staff at the Texas Instruments Semiconductor Process and Design Center in Dallas, Texas, where he worked on semiconductor process representation, process/device simulation tool integration, and statistical modeling and optimization. Dr. Boning is an Associate Editor for the IEEE Transactions on Semiconductor Manufacturing, and has served as chairman of the CFI/Technology CAD Framework Semiconductor Process Representation Working Group. He is a member of the IEEE, Eta Kappa Nu, Tau Beta Pi, Sigma Xi, and the Association of Computing Machinery.