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Dr. Baas' research interests are in the algorithms, applications, architectures, arithmetic, circuits, VLSI design, and software tools for high-performance, energy-efficient, and area-efficient computation with consideration of the challenges and opportunities of future fabrication technologies. He is interested in both programmable and special-purpose processors with an emphasis on DSP, multimedia, and embedded workloads with recent projects targeting datacenter and scientific workloads. Projects include the AsAP (Asynchronous Array of simple Processors) programmable array processor chips (36 processors, 167 processors, 1000 processors), applications, and tools; Low Density Parity Check (LDPC) decoders; Fast Fourier Transform (FFT) processors; viterbi decoders; Advanced Encryption Standard (AES) ciphers; Synthetic Aperture Radar (SAR); H.264 video codecs; Display Stream Compression (DSC) codecs; sorting and string-search engines; and machine learning engines. His group is one of very few university groups in the world that design and fabricate programmable (and configurable special-purpose) processor chips. They have designed what are believed to be the #1 and #2 highest clock rate fabricated processors ever designed in a university, and among the largest deep-submicron CMOS chips ever designed in a university.
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Shifu Wu,Bevan M. Baas
Midwest Symposium on Circuits and Systemspp.957-961, (2023)
Thomas Abbott,Bevan M. Baas
2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)pp.411-418, (2023)
2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)pp.187-194, (2022)
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)pp.1-6, (2022)
2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)pp.1-5, (2022)
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