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Alberto Martinez graduated from Universidad Simon Bolivar, Caracas, Venezuela, in 1986 as Ingeniero Electrónico and began his career at Epson Corporation where he was a key part of the development of industrial infrastructure including manufacturing, design, and distribution of high-speed personal printing for Latin America. He counted as customers large technology universities such as Simon Bolivar University in Caracas, Venezuela, and the Venezuelan Central Bank. He joined Intel Corporation, Folsom, CA, USA, in 1994 while completing the M.Sc. degree in electrical engineering in California State University, Sacramento campus, Sacramento, CA. He has been involved with platform architecture activities for the last 26 years achieving the recognition of Intel Fellow in 2015. He has 12 patents and several others pending. He has provided and influenced multiple generations of Intel’s chipsets architecture such as Advance Graphic Port (High-end video display devices) “AGP 8×” multi-display capability, PnP IO, Storage SATA and PCIe, Advanced Power Management, ACPI, and CPPM (S0ix). He was the Lead Architect for integrated audio capabilities, USB2, and PCI Express, remote manageability, DRM, and remote system attestation. Most recently, he was the Technical Project Engineer for Intel iCore 11th code name Tiger Lake delivering on Intel’s 10-nm process technology capabilities as USB4-Thunderbolt, up to 2X Gfx performance and 20% IA improvements, with ultralow power features. In 2020, he joined Microsoft Corporation, Kirkland, WA, USA, as a Partner for the Windows + Devices organizations driving Si Architecture for SoC and working closely with Si Vendors in requirements and definition for next-generation computer system.
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论文共 3 篇作者统计合作学者相似作者
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Per Hammarlund,Alberto J. Martinez, Atiq A. Bajwa,David L. Hill,Erik Hallnor,Hong Jiang,Martin Dixon, Michael Derr, Mikal Hunsaker,Rajesh Kumar,Randy B. Osborne,Ravi Rajwar,
IEEE Microno. 2 (2014): 6-20
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